Semiconductor Engineering

Achieving Numerical Precision And Design Customization With Flexible Floating-Point IP

As defined by the IEEE 754 standard, floating-point values are represented in three fields: a significand or mantissa, a sign bit for the significand and an exponent field. The exponent is a biased ...
Business Wire

New Cadence Tensilica FloatingPoint DSP Family Delivers Scalable Performance for a Broad Range of Compute-Intensive Applications

SAN JOSE, Calif.--(BUSINESS WIRE)--Cadence Design Systems, Inc. (Nasdaq: CDNS) today unveiled the Cadence ® Tensilica ® FloatingPoint DSP family, which provides a scalable and configurable solution ...
EDN

Implementing floating-point DSP on FPGAs

For developers using FPGAs for the implementation of floating-point DSP functions, one key challenge is how to decompose the computation algorithm into sequences of parallel hardware processes while ...
Electronic Design

As Audio Apps Push the Quality Frontier, Floating-Point DSP Architectures Take Center Stage

The shift to larger data words and higher sampling rates in audio applications is creating challenges for the audio developer. Here’s some advice on how to deal with the transition. The demand for ...
Electronic Design

Dealing with the Absence of an FPU Using Fixed Point in Ada

Many numerical applications typically use floating-point types to compute values. However, in some platforms, a floating-point unit may not be available. Other platforms may have a floating-point unit ...
Semiconductor Engineering

AI Chips Must Get The Floating-Point Math Right

Most AI chips and hardware accelerators that power machine learning (ML) and deep learning (DL) applications include floating-point units (FPUs). Algorithms used in neural networks today are often ...