EDN

IC, package co-design proving elusive, experts say

SAN JOSE, Calif. — IC package design has become a huge bottleneck for getting chips out the door, but there are few automated tools that can help, according to panelists at the International Symposium ...
EDN

Chip-and-package co-design relieves pressure on complex designs

The vise is closing down on design departments.Manufacturers want more capabilitiesin their products than ever before. It’simperative for manufacturers to remaincompetitive. Marketing, meanwhile,wants ...
Yahoo Finance

Cadence SiP Technologies and Allegro Package Designer Optimized for Hand-Held Consumer Electronics Market

TEMPE, AZ--(Marketwire - Oct 22, 2012) - EPEPS -- Cadence Design Systems, Inc. (NASDAQ: CDNS), a leader in global electronic design innovation, today announced enhancements to its Allegro ® 16.6 ...
it.tmcnet

Cadence Unveils Enhanced Allegro Package Designer, SiP Layout

Cadence Design Systems (News - Alert), Inc. has unveiled an enhanced version of its Allegro 16.6 Package Designer and System-in-Package offering. Discreet IC package necessities for next-generation ...
Electronic Design

Advanced Package Design Fosters Smaller, More Efficient Semiconductors

Members can download this article in PDF format. Today, advances in semiconductors and ICs are producing ever smaller and denser circuits. With that comes the challenge of efficiently packaging and ...
Fast Company

Package Design

Originally, I started to write this entry about a Sustainable Brand Identity. But as I put pen to paper and fingers to keyboard, I realized that my opening paragraph deserved a bit more attention.